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We expanded our serial-attached memory controller portfolio to address the traditional parallel-attached memory efficiency plateau by developing controllers with more memory bandwidth per core and more memory capacity per core. Optimizing modern CPUs for the continuous computational demands of Artificial Intelligence (AI), Machine Learning (ML), cloud computing and data analytics application workloads lowers the overall Total Cost of Ownership (TCO) in the data center.
SMC 2000 Smart Memory Controllers are best-in-class Compute Express Link (CXL) Type 3 memory controllers designed to meet the growing memory bandwidth and capacity demands of data center workloads. The SMC 2000 series supports the CXL 1.1 and CXL 2.0 specifications utilizing CXL.mem sub-protocol for low-latency memory expansion and CXL.io sub-protocol for management. The low-latency SMC 2000 16×32G and SMC 2000 8×32G memory controllers are designed to CXL 1.1 and CXL 2.0 specifications, comply with DDR4 and DDR5 JEDEC standards and support PCIe® 5.0 specification speeds. The SMC 2000 16×32G is the industry’s highest-capacity controller with 16 lanes operating at 32 GT/s with two channels of DDR4-3200 or DDR5-4800, resulting in a significant reduction in the required number of host CPU or SoC pins per memory channel.
Typical applications for the SMC 2000 family include AI, ML, High-Performance Computing (HPC) and other applications that require an increased number of memory channels to deliver more memory bandwidth and capacity.
The SMC 1000 8×25G serial memory controller enables CPUs and other compute-centric SoCs to utilize four times the memory channels of parallel attached DRAM within the same package footprint compared to DDR4. The SMC 1000 8×25G enables higher memory bandwidth and media independence for HPC, big data, AI and ML compute-intensive applications with ultra-low latency.
The SMC 1000 8×25G interfaces to the CPU via a narrow 8-lane differential Open Memory Interface (OMI)-compliant 25-Gbps interface and bridges to memory via a wide 72-bit DDR4 3200 interface. It supports three DDR4 data rates—DDR4-2666, DDR4-2933 and DDR4-3200—resulting in a significant reduction in the required number of host CPU or SoC pins per DDR4 memory channel. This allows for more memory channels and therefore increases the available memory bandwidth. The SMC 1000 8×25G also features an innovative low-latency design, which enables memory systems to have virtually the identical bandwidth and latency performance as comparable LRDIMM products.
SMC 2000 Smart Memory Controllers provide a significant increase in low-latency DRAM memory bandwidth and capacity per CPU/GPU core, media independence and reduction of TCO through support of both DDR4 and DDR5. Additional benefits include industry-leading Reliability, Availability and Serviceability (RAS) and enhanced security, ECC and telemetry features that allow modern CPUs to optimize application workloads.
Learn more about our SMC 1000 Smart Memory Controllers.
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