Mission-critical applications running on embedded platforms require state-of-the-art security design both in hardware and software. The combination of our hardware and Canonical^® software is designed with security in mind, from the get-go. 

Using Ubuntu^® long-term support releases, enterprise and device makers can leverage a stream of security patches over the full device lifecycle. Furthermore, for critical embedded workloads Canonical has developed Ubuntu Core. Ubuntu Core is a type of Ubuntu tailored for mission-critical embedded applications, it enables developers to strictly confine and update key elements of the systems without risking compromising the entire system. 

Join us to learn more about how Microchip and Canonical are collaborating to enhance security and reliability in the embedded ecosystem.

We have collaborated with Acceleration Robotics to integrate ROS 2 in the PolarFire SoC FPGA. In this talk, Víctor Mayoral-Vilches from Acceleration Robotics will discuss the results of our joint effort to enable the latest ROS 2 distribution (Humble Hawksbill) in the PolarFire SoC boards as an extension of the Yocto Board Support Package (BSP) that we offer. 

In this webinar we will discuss what OS-aware application debugging is and how to set it up using Lauterbach’s TRACE32^® suite of tools. We will use the Zephyr RTOS running on the PolarFire^® SoC FPGA Icicle Kit as target platform. We will demonstrate the most important steps in OS-aware debugging and provide some tips and tricks for easy and effective debugging.

In this webinar, we will provide a methodology overview of advanced linting and CDC analysis, demystify the type of design problems they solve and show how they can be added to the Libero^® tools flow. We will then show a working example of how these methods can be applied to PolarFire^® SoC FPGA Icicle designs. Starting from Libero IDE, we will show automated project conversion into the Aldec ALINT-PRO environment for advanced linting, block and top-level constraints development and CDC analysis.

This webinar will discuss techniques you should consider when designing, implementing, validating and maintaining your Linux-based device. You will also learn how to resolve any CVEs that might arise during the life of your RISC-V PolarFire SoC FPGA device.

With President Biden’s EO 14028, the White House’s new National Cybersecurity Strategy, the FDA’s new guidance for cybersecurity in medical devices and the EU Cyber Resilience Act, the world of SBOMs has changed rapidly. SBOMs and a strong cybersecurity plan for new and existing devices are no longer optional. But where do you start? What standards and compliance requirements should you be aware of? What are the security risks and Common Vulnerabilities and Exposures (CVEs) lurking in your products? How do you use SBOMs to mitigate risk as part of DevSecOps? How can knowing what’s in your software prepare you to stay protected from the next cyberattack? Join Timesys and Microchip for an enlightening discussion on the best practices for leveraging SBOMs to help keep your device secure throughout the entire product lifecycle.